Driving methods for organic light-emitting displays (OLEDs) may be categorized into two types, i.e., Passive Matrix (PM) and Active Matrix (AM). Compared with PM driving methods, AM driving methods have advantages of a large amount of display information, low power consumption, long lifespan, high image contrast ratio and the like. As shown in FIG. 1, an equivalent circuit of a pixel unit of an active matrix organic light-emitting display (AMOLED) in the prior art comprises: a switching tube M1, a driving tube M2, a storage capacitor C1 and an organic light-emitting diode D1. The switching tube M1 is turned on when its gate is enabled by a scanning signal Vscan(n), and a data signal Vdata is introduced. The driving tube M2 generally works in saturation region, and its gate-source voltage Vgs (i.e., the data signal Vdata) determines a current flowing therethrough, and thus a stable current is provided for the organic light-emitting diode D1. Here, VDD, as a supply voltage, provides energy required by the organic light-emitting diode D1 to emit light, that is to say, VDD affects luminous intensity of the organic light-emitting diode D1. The storage capacitor C1 is used to keep the gate voltage of the driving tube M2 stable during a period of one frame.
Of course, other threshold compensation circuit may be additionally provided to compensate threshold drift of the driving transistor M2, so that the current flowing through the driving tube M2 is not affected by the threshold voltage drift thereof.
FIG. 3 is a schematic diagram of a cross-sectional structure of a pixel of an AMOLED display panel, which comprises a substrate 1, a buffer layer 4 provided on the substrate 1, an active layer 6 provided on the buffer layer 4, a second insulation layer 5 provided on the active layer 6, a layer including a gate 9 and a signal wiring area 15 and provided on the second insulation layer 5, a third insulation layer 7 provided on the layer including the gate 9 and the signal wiring area 15, and a source 8, a drain 10 and a power signal connection line 22 provided on the third insulation layer 7. The power signal connection line 22 shown in the figure may be connected to the thin film transistor as required, the source 8 and the drain 10 of the thin film transistor are connected to the active layer 6 through via holes, 11 denotes a planarization layer, 12 denotes an anode of an organic light-emitting diode, which is connected to the drain 10 through a via hole, 14 denotes an organic light-emitting layer, and 13 denotes a pixel define layer.
As shown in FIG. 2, according to the current design, all pixels (“∘” in FIG. 2 denotes omitted pixels 17) are connected together through VDD wires 16 in the periphery of and inside a display area 18. However, with an increase in resolution, every pixel 17 becomes smaller, and as a result, a relative large voltage drop may occur when the VDD wires 16 become very thin and long, which leads to different VDD voltages in different pixel units, and accordingly leads to difference in driving voltage among the organic light-emitting diodes D1, thus resulting in non-uniform display brightness of the panel in severe cases.